This invention is directed to the field of semiconductor processing, and more particularly, to a novel multiple-processing and contamination-free plasma etching system.
Plasma etching devices are commonly employed during one or more of the phases of the integrated circuit fabrication process, and are typically available in either a single-wafer or a plural-wafer configuration. The single-wafer configurations, while providing excellent process control, suffer from a restricted system throughput capability. Efforts to relieve the throughput limitations, such as those that have employed faster but higher-temperature etching processes, have been generally unsuccessful. For these higher-temperature etching processes, system utility is limited due to the undesirable phenomenon of resist xe2x80x9cpoppingxe2x80x9d, notwithstanding that various cooling approaches have been used including clamping, cooling of the wafer underside with a helium flow, and the mixing of helium into the plasma. The multiple-wafer configurations, while providing a comparatively much-greater system throughput, have been generally subject to less-than-desirable process and quality control. Not only are end-point determinations for each of the multiple wafers either not available or not precisely determinable, but also electrode positional accuracy for different electrode gaps and correspondingly different gas chemistries is often difficult to establish and maintain. The single-wafer and the multiple-wafer configurations are both subject to the further disadvantage that two or more step processes typically expose the wafers to an undesirable environment in the intermediate handling step, which materially increases the possibility of wafer contamination, and which further restricts the processing throughput.
The present invention contemplates plural single-wafer plasma reactors each operative individually to provide excellent process control of single wafers, collectively operative to provide a system throughput limited only by the number of the plural plasma reactors, and so cooperative with a common wafer transfer and queuing means as to provide both single-step and multiple-step wafer processing in a manner that neither exposes the wafers to an undesirable atmosphere nor to human handling.
In the preferred embodiment, plural plasma reactors and a cassette elevator are symmetrically arrayed about an X, TT movable wafer arm assembly. The plural reactors, the cassette elevator, and the X, TT movable wafer arm are maintained in a controlled vacuum condition, and the central X, TT movable wafer arm is in radial communication with the peripherally surrounding plasma reactors and cassette elevator via a corresponding one of a plurality of vacuum lock valves. The arm of the R, TT movable wafer arm assembly includes an apertured platform for supporting each wafer, and a cooperative bumper for releasably engaging the back and the periphery of the supported wafer without any wafer front surface contact. Plural wafer contact responsive sensors mounted to the platform are operative to provide a signal indication of whether or not the wafer is in a properly seated condition. Each of the plural plasma reactors includes a stationary bottom electrode and a movable upper electrode that are cooperative to provide a variable wafer-cathode to anode gap therebetween of a selectable dimension. In one embodiment, a support assembly including a micrometer adjustment stop is provided for selectively positioning the movable electrode, and in another embodiment, a combination micrometer stop and pneumatic actuators are provided for selectively positioning the movable electrode. A vertically movable pedestal is slidably mounted centrally to the stationary electrode of each of the plural plasma reactors that cooperates with the apertured platform of the R, TT movable wafer arm assembly to load and unload the wafers respectively onto and off of the stationary electrode. A reactant gas injection system, a RF power source, and an end-point determination means are operatively coupled to each of the plural plasma reactors. The plural plasma reactors are operable in either embodiment to run the same or different processes, and are cooperative with the R, TT movable wafer arm assembly to provide one of the same single-step processing simultaneously in the plural plasma reactors, different single-step processing simultaneously in the plural plasma reactors, and sequential two or more step processing in the plural reactors. Two embodiments of the R, TT movable wafer arm assembly are disclosed.